Staff Design Verification Engineer
Marvell View all jobs
- Toronto, ON
- $98,100-130,800 per year
- Permanent
- Full-time
- Design verification for various type of SerDes IPs ranging from 10Gbps to 224Gbps data-rates for different applications.
- Use and improve UVM DV environment
- Improve the design methodology and flow.
- Collaborate with Analog/DSP/Digital Design/FW/AE teams to deliver the competitive SerDes IP solutions for all the Marvell product lines.
- Provide the support to the product teams, for both pre and post silicon
- Fundamental concepts in digital logic design
- Understand ASIC verification flows and methodologies
- Verilog, SystemVerilog, UVM
- UNIX Shell scripting (Csh, Bash)
- Experience with VIPs
- Formal verification
- PCIe, UCIe protocol knowledge
- Low power design
- MATLAB and C/C++ based system simulation and evaluation
- DSP function hardware implementation knowledge
- Strong Perl and Python scripting