Analog Design, Architect – High‑Speed SerDes

Synopsys View all jobs

  • Markham, ON
  • Permanent
  • Full-time
  • 2 months ago
Synopsys-Canada-ULC-values-the-diversity-of-our-workforce.-We-are-committed-to-provide-access-&-opportunity-to-individuals-with-disabilities-and-will-provide-reasonable-accommodation-to-individuals-throughout-the-recruitment-and-employment-process.-Should-you-require-an-accommodation,-please-contact-
a-data-fr-linked="true"-href="mailto:hr-help-canada@synopsys.com"
hr-help-canada@synopsys.com
/a
.
/span/p
custom_fields.CareerAreas-Analog-Design custom_fields.SubCategory-Analog-Design custom_fields.EmployeeStatus-Employee custom_fields.unposting_date-2027-02-02 custom_fields.Multikeywordfacets-Hardware">Join our Talent Community! .Find Jobs ForWhere? Search JobsAnalog Design, Architect – High‑Speed SerDes - 14576Markham, Ontario, CanadaEngineeringEmployeeSave Job ShareJump toOverviewOur Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.Play VideoJob DescriptionDate posted 02/02/2026Category Engineering Hire Type Employee Job ID 14576 Remote Eligible No Date Posted 02/02/2026Role Overview:We are seeking a highly experienced Architect specializing in high-speed SerDes design with deep expertise in advanced analog/mixed-signal circuits, XSR (Extra-Short-Reach) interfaces, and optical I/O technologies. In this role, you will provide technical leadership across complex, next-generation PHY architectures, driving innovation from concept through production. You will work with cross-functional teams and influence strategic direction across product lines while solving highly complex design challenges in advanced process nodes.Key Responsibilities:Advanced SerDes Architecture
  • Lead the architectural definition of the E224+ SerDes, including identifying required modifications to meet customer-driven performance, power, and latency targets.
  • Architect and specify high-performance analog front-ends, including CTLE/DFE, TX FIR filters, PLLs/CDRs, ADC/DAC-based architectures, and clocking subsystems.
  • Updated channel modeling assumptions
  • VSR-specific equalization strategies
  • AFE re-partitioning and optimization
  • Clocking improvements and tighter jitter budgets
  • Lead feasibility analysis and modeling of next-generation SerDes channels, including electrical, XSR, and optical interconnect environments.
  • Drive innovation in optical I/O, including modulator/driver integration, TIAs, and photonics-electrical co-design workflows.
  • Technical problem-solving leading debug of complex silicon issues spanning analog, digital, packaging, and optical domains.
  • Develop innovative solutions to challenging PHY-level problems using deep expertise in circuits, channel modeling, and system behavior.
  • Partner with cross-disciplinary teams to contribute to long-term technology strategy in SerDes, chiplets, and optical-interconnect domains that are aligned to industry trends.
Analog & Mixed-Signal Design
  • Define and guide development of critical analog building blocks:
  • CTLE, DFE, slicers
  • High-speed TX drivers and VSR-tuned FIR tap structures
  • CDR/PLL architectures supporting sub-ps jitter
  • ADC/DAC-based receive architectures, if applicable
  • Optimize AFE and receiver signal chains for VSR channels, extremely low reach, and tighter insertion-loss budgets.
  • Guide design teams through detailed analog/mixed-signal design, circuit partitioning, performance optimization, and silicon validation strategy.
  • Review and approve block-level and top-level designs, ensuring alignment to architectural intent and performance targets.
  • Collaborate with layout, modeling, signal-integrity, packaging, and system teams to optimize end-to-end performance and power.
Required Qualifications:
  • 15+ years of experience in analog/mixed-signal circuit design, SerDes PHYs, or related high-speed I/O.
  • Proven track record architecting multi-generation SerDes PHYs, preferably at 56G+, 112G+, or 224G+.
  • Deep expertise in analog building blocks: LNAs, TIAs, CTLE, DFE, TX drivers, PLL/CDR, ADC/DAC-based SerDes.
  • Hands-on silicon bring-up experience in SerDes or high-speed analog designs.
  • Experience working with foundries on advanced process nodes (e.g., 5nm, 3nm).
  • Skilled in simulation/verification (Spice, AMS), modeling (Matlab/Simulink, Verilog-A), and lab measurement methodologies.
  • Hands-on knowledge of XSR/USR interfaces and chiplet-based architectures.
  • Demonstrated ability to lead large, cross-functional technical initiatives with minimal oversight.
Preferred Qualifications:
  • Experience with DSP equalization, MLSD, or nonlinear cancellation for 224G+ operation.
  • Experience with optical links, co-packaged optics, optical modulators, drivers, and photonics integration a strong asset.
  • Strong understanding of signal integrity, channel modeling, equalization techniques, and advanced packaging (2.5D/3D, interposers).
  • Publications, patents, or industry recognition in high-speed I/O or optical domains.
  • Ability to mentor senior designers and uplift organizational technical capability.
Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact .Save Job test ShareBenefitsAt Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.Health & WellnessComprehensive medical and healthcare plans that work for you and your family.Time AwayIn addition to company holidays, we have ETO and FTO Programs.Family SupportMaternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.ESPPPurchase Synopsys common stock at a 15% discount, with a 24 month look-back.Retirement PlansSave for your future with our retirement plans that vary by region and country.CompensationCompetitive salaries.** Benefits vary by country and region - check with your recruiter to confirmGet an idea of what your daily routine around the office can be likeHiring Journey at SynopsysApplyWhen you apply to join us, your resume, skills, and experience are first reviewed for consideration.Phone ScreenOnce your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have.InterviewNext up is interviewing (in person or virtual). You'll be invited to meet with members of the hiring team to discuss your skills and experience, and what you're looking for in your next role.OfferCongratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept!OnboardingThere will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation.Welcome!Once you've joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you'll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Synopsys