RTL Design Engineer
Advanced Micro Devices View all jobs
- Markham, ON
- Permanent
- Full-time
- Develop RTL for ASIC design-for-test (DFT) features as per architectural or design flow automation specifications.
- Partner with architecture team to define design improvements, new initiatives that drive our IP forward to achieve best-in-class Scan Coverage, DPPM, and Debug capabilities.
- Support RTL design integration, insertion, synthesis, equivalency checking, timing analysis and defining constraints, verification of DFx logic at RTL and GLS, ATPG and Scan GLS.
- Work with multi-functional teams to provide IP and SOC integration support, collaboration to develop solutions for complex/unique problems
- Support post-silicon debug, and taking learnings to propose RTL and micro-architecture improvements
- Clearly document designs, debug findings, and methodology improvements, and communicate status and risks to cross-functional stakeholders.
- Strong hands-on experience with SystemVerilog / Verilog RTL design on complex SoCs.
- Demonstrated ability to write clean, scalable, and reusable RTL used across multiple SoCs
- Strong understanding and experience using Lint, CDC, Synthesis, STA tools
- Proven ability to debug issues across RTL, gate-level netlists, constraints, and tool flows.
- Experience working in UNIX/Linux environments, with scripting proficiency in TCL, Perl, or shell.
- Strong collaboration, communication, and ownership mindset in a fast-paced, globally distributed engineering environment.
- Prior experience delivering DFT solutions through full silicon life cycles, from early RTL to post-silicon bring-up and yield ramp, is highly valued.
- Bachelors or Masters degree in Computer Engineering/ Electrical Engineering