Low Power Design Engineer (RTL Design in ASIC)
Advanced Micro Devices
- Markham, ON
- Permanent
- Full-time
- Collaborate with global Video IP development teams, firmware engineers on Video IP Power methodology and SoC integration aligned to SoC milestones
- Work with SoC teams related to the IP power features, implement low power features and publish power metrics
- Develop low power RTL techniques and implement in VCN IP power environment.
- Develop System Verilog, C-model, and C++ bus functional models for specific features
- Develop or adapt, and verify IP PG/NLP tests, PA CDC, UPF Params, XOVER metrics
- Work with SoC Power team to debug power numbers and test failures and debug at IP and chip level
- Proficient in Digital Logic design, IP Low Power methodology and SoC integration
- Five years of Hands-on RTL design experience in ASIC product development
- Strong knowledge on low power techniques, industry standard power flows
- Proficient in System Verilog, UVM test benches, UPF flow and scripting languages (csh, perl, Python, etc.)
- Proficient in simulation, debugging, Synthesis, lint and CDC tools
- BS degree in Electrical or Computer Engineering
- MS degree preferred