
Senior Digital Verification Engineer
- Ottawa, ON
- $100,900-161,100 per year
- Permanent
- Full-time
- Read and understand the architecture and functional requirements specification document(s) and communicate and collaborate with systems engineers and architects.
- Thoroughly validate one or more architectural functional blocks using a combination of simulation, formal, and coverage methods.
- Develop verification, functional coverage and formal verification test plans.
- Create testbench environments and components, agents, scoreboard, and test scenarios using System Verilog UVM and/or C.
- Perform coverage-driven verification, monitor regressions, and debug failures with the support of the function's designer.
- Provide regular status updates on verification progress on a regular basis.
- Minimum Bachelor's degree in Electrical or Computer Engineering.
- Significant experience in using System Verilog, UVM, SVA, and simulators from major vendors.
- Proven ability to determine comprehensive digital verification and coverage strategies.
- Experience with formal verification methods
- Knowledge and exposure in DSP and/or Forward Error Correction
- Familiarity with programming languages such as: Python, Make, bash, object-oriented programming, C, C++.
- Proficiency in bug tracking using Jira and source code management and revision tracking using GIT.
- Knowledge of digital analog converters and PLLs