Collaborate with hardware/system architects to micro-architect/design HW specific to Multimedia and Camera Image Perform design rule checks, low power checks, cross-clock-domain (CDC) checks. Evaluate performance, area, power, and system cost tradeoffs Work closely with design verification engineers to develop test plans and reference bus-functional models Implement and debug tests at both the module and core level throughout the development cycle Experience with RTL sanity tools specific to Design Rule Checking , Clock Domain Crossing checks, Synthesis, Timing analysis, Low power checks Experience with System Verilog or System C ASIC implementation of Image Processing Camera IP Experience working with synthesis and physical design teams New Headcount Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. OR Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 3+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. OR PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.