Mixed-Signal AMS Co-Simulation Verification Engineer
Synopsys View all jobs
- Mississauga, ON
- Training
- Full-time
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custom_fields.CareerAreas-ASIC-Digital-Design custom_fields.SubCategory-ASIC-Digital-Design custom_fields.EmployeeStatus-Employee custom_fields.unposting_date-2027-04-30 custom_fields.Multikeywordfacets-Hardware">Join our Talent Community! .Find Jobs ForWhere? Search JobsMixed-Signal AMS Co-Simulation Verification Engineer - 16820Mississauga, Ontario, CanadaEngineeringEmployeeSave Job ShareJump toOverviewOur Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.Play VideoJob DescriptionDate posted 04/08/2026Category Engineering Hire Type Employee Job ID 16820 Remote Eligible No Date Posted 04/08/2026We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, enabling everything from self-driving cars to advanced learning machines. As the global leader in EDA tools, semiconductor IP, and silicon engineering solutions, we empower the creation of the world's most advanced chips across AI/ML, high-performance computing, automotive, cloud, and mobile applications. Within our IPG division, we develop high-speed SERDES, PHYs, and mixed-signal IP that powers industry-leading SoCs. Join us to transform the future through continuous technological innovation and world-class engineering excellence.You Are:You are a passionate engineer who thrives at the intersection of analog and digital design. With a keen analytical mindset and a collaborative spirit, you are motivated by solving complex technical challenges that drive the future of connectivity. Whether you are an ambitious new graduate eager to launch your career or an experienced engineer ready to deepen your expertise, you are excited by the opportunity to work on advanced Ethernet and PCIe SERDES IP deployed in the most cutting-edge SoCs. You value not only technical mastery but also teamwork, mentorship, and the continuous pursuit of innovation.Your curiosity leads you to understand how analog and digital worlds interact, and you are meticulous in ensuring the highest standards of silicon reliability and performance. You are comfortable navigating the intricacies of co-simulation environments, debugging cross-domain issues, and collaborating with diverse teams across the globe. You bring a growth mindset and a commitment to excellence, eager to learn from industry leaders while also contributing your own insights to shape next-generation IP. If you thrive in a fast-paced, high-impact engineering environment and are driven by a sense of ownership and technical rigor, you will find Synopsys IPG to be the ideal environment to accelerate your career and make a meaningful impact.What You'll Be Doing:
- Define, implement, and track comprehensive verification test plans to ensure robust coverage and quality for SERDES IP.
- Build, enhance, and maintain top-level UVM-based System Verilog testbenches and AMS co-simulation environments, integrating RTL, behavioral models, and transistor-level netlists.
- Perform functional verification of SERDES blocks, including TX/RX data paths, equalization algorithms, adaptation loops, CDR behavior, PLL locking, and analog/digital interactions.
- Debug and resolve simulation failures across analog, digital, and mixed-signal domains, ensuring root-cause analysis and timely solutions.
- Conduct design reliability checks such as electromigration (EM), IR analysis, and device-level stress evaluations to ensure silicon robustness.
- Collaborate closely with mixed-signal designers, modeling engineers, and system architects across global Synopsys teams to deliver best-in-class IP.
- Enable the successful verification and deployment of high-performance SERDES and mixed-signal IP in leading-edge SoCs worldwide.
- Drive quality and reliability in silicon that powers AI, automotive, cloud, and mobile applications at massive scale.
- Advance the state-of-the-art in AMS co-simulation methodologies, influencing future verification flows and processes.
- Contribute to the early detection and resolution of critical design issues, reducing time-to-market and silicon re-spins.
- Foster cross-disciplinary collaboration and technical knowledge sharing across analog, digital, and architecture teams.
- Enhance Synopsys' reputation as the premier provider of high-speed connectivity IP through engineering excellence and innovation.
- Bachelor's or master's degree in electrical engineering or a related field (Master's preferred for new grads). With an interest to grow within high-speed SERDES and mixed signal verification.
- Strong foundational understanding of analog circuits (op-amps, bandgaps, PLLs, ADCs, TX/RX components, etc.).
- Exposure to Verilog/System Verilog and AMS concepts or circuit design (coursework, labs, or hands-on experience).
- Experience with AMS tools such as HSPICE, XA, Custom Sim, VCS, and scripting languages like Python, Perl, and UNIX shell.
- Proficiency with System Verilog/UVM and AMS tools (HSPICE, XA, Custom Sim, VCS).
- Ability to debug analog-digital interactions and define robust verification strategies; experience mentoring is a plus for senior candidates.
- Analytical and detail-oriented, with strong problem-solving and debugging skills.
- Effective communicator who collaborates well in multidisciplinary and multicultural teams.
- Self-motivated and driven to deliver high-quality results in a fast-paced environment.
- Adaptable and eager to learn, with a passion for continuous improvement and innovation.
- Proactive in seeking feedback, sharing knowledge, and mentoring others when possible.