Design Verification Engineer
Advanced Micro Devices View all jobs
- Markham, ON
- Permanent
- Full-time
- Develop and enhance SystemVerilog/UVM-based testbenches for verifying new features.
- Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in memory sub-system architecture.
- Create staging and test plans for new feature development.
- Effectively testing a design by understanding the functional and performance goals.
- Take ownership of different verification tasks.
- Improve productivity through automation using languages like Perl, Python and Tcl/Tk.
- Architected and developed complex verification environments in SystemVerilog or C++.
- Have personally implemented verification tests, sequences, scoreboards, checkers, assertions and coverage groups.
- Experience with Low Power Verification and debug methodology is a plus.
- Exposure to RTL design, software development, formal verification, or other related domains.
- Excellent communication, management, and presentation skills.
- Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy/DVE).
- Good attention to detail and creative thinking ability.
- Self-starter and team player with strong analytical skills and independent working ability.
- Bachelor’s or Master’s degree in related discipline preferred.