Digital Design Verification Engineer
Synopsys View all jobs
- Ottawa, ON
- Permanent
- Full-time
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custom_fields.CareerAreas-ASIC-Digital-Design custom_fields.SubCategory-ASIC-Digital-Design custom_fields.EmployeeStatus-Employee custom_fields.unposting_date-2027-04-09 custom_fields.Multikeywordfacets-Hardware">Join our Talent Community! .Find Jobs ForWhere? Search JobsDigital Design Verification Engineer - 14733Ottawa, Ontario, CanadaEngineeringEmployeeSave Job ShareJump toOverviewOur Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.Play VideoJob DescriptionDate posted 04/05/2026Category Engineering Hire Type Employee Job ID 14733 Remote Eligible No Date Posted 04/05/2026We Are:At Synopsys, we drive innovations that shape how we live and connect. Our technology is central to chip design, verification, and IP integration, empowering high-performance silicon chips and software content. Join us to transform the future through technological innovation.You Are:You are a detail-focused engineer with strong digital design and verification skills. You thrive in collaborative environments, enjoy solving complex problems, and are proficient in SystemVerilog, UVM, and scripting languages. You are eager to learn and contribute to cutting-edge projects.What You'll Be Doing:
- Defining and tracking verification testplans
- Designing SystemVerilog testbenches using UVM
- Applying mixed-signal verification techniques
- Creating and analyzing functional coverage
- Writing SystemVerilog assertions
- Debugging simulation failures
- Ensuring reliable, high-quality silicon products
- Accelerating development cycles
- Enhancing product performance
- Driving innovation in verification methodologies
- Collaborating across teams
- Influencing best practices
- BSEE with at least 1 year of direct industry experience
- Strong digital design theory knowledge
- Experience with UVM and SystemVerilog
- Mixed-signal verification understanding
- Testplan and coverage analysis skills
- Scripting experience (Perl, Python, Bash, Csh)
- Analytical and detail-oriented
- Collaborative team player
- Quick learner
- Effective communicator